1. Technical Field
The present disclosure relates in general to a liquid crystal display (LCD) and a protection circuit thereof. In particular, the present disclosure relates to an LCD comprising an electrostatic discharge (ESD) protection circuit.
2. Description of the Related Art
Conventional LCDs comprise a plurality of pixels arranged in arrays. Transmittance of the liquid crystal of each pixel is adjusted by applied voltage thereon. Thus, a desired gray level is presented on the screen.
FIG. 1 is a schematic diagram of a conventional liquid crystal display panel and the peripheral driving circuits thereof. As shown in the figure, an LCD panel 1 is formed by interlacing data electrodes (represented by D1, D2, D3, . . . , Dm) and gate electrodes (represented by G1, G2, G3, . . . , Gm), each of the interlaced data electrodes and gate electrodes control a display cell. As an example, interlacing data electrode D1 and gate electrode G1 control the display cell 100. The equivalent circuit of each display cell comprises thin film transistors (TFTs) (Q11-Q1m, Q21-Q2m, . . . , Qn1-Qnm) and storage capacitors (C11-C1m, C21-C2m, . . . , Cn1-Cnm). The gates and drains of the TFTs are respectively connected to gate electrodes (G1-Gn) and data electrodes (D1-Dm). Such a connection can turn on/off all TFTs on the same line (i.e. positioned on the same scan line) using a scan signal of gate electrodes (G1-Gn), thereby controlling the video signals of the data electrodes to be written into the corresponding display cell. In addition, the storage capacitor is connected between the corresponding thin film transistor and a common electrode 14 with voltage VCOM.
In addition, FIG. 1 additionally shows a portion of the driving circuit of the LCD panel 1. The gate driver 10 outputs one or more scan signals (also referred to as scan pulses) from each of the gate electrodes G1, G2, . . . , Gn according to a predetermined sequence. When a scan signal is carried on one gate electrode, the TFTs within all display cells on the same row or scan line are turned on while the TFTs within all display cells on other rows or scan lines are turned off. When a scan line is selected, data driver 12 outputs a video signal (gray value) to the m display cells of the respective rows through data electrodes D1, D2, . . . , Dm according to the image data to be displayed. After gate driver 10 scans n rows continuously, the display of a single frame is completed. Thus, repeated scans of each scan line can achieve the purpose of continuously displaying an image. As shown in FIG. 1, signal CTR indicates the scan control signal received by the gate driver 10, signal LD indicates a data latch signal of the data driver 12, and signal DATA indicates the image signal received by the data driver 12.
Typically, a video signal, which is transferred by the data electrodes D1, D2, . . . , Dm, is divided into a positive video signal and a negative video signal based on the relationship with the common electrode voltage VCOM. The positive video signal indicates a signal having a voltage level higher than the voltage VCOM, and based on the gray value represented, the actual produced potential of the signal ranges between voltages Vp1 and Vp2. In general, a gray value is lower if it is closer to the common electrode voltage VCOM. Conversely, the negative video signal indicates that the signal has a voltage level lower than the voltage VCOM, and based on the gray value represented, the actual produced potential of the signal ranges between voltages Vn1 and Vn2. Additionally, the gray value is lower if it is closer to the common electrode voltage VCOM. When a gray value is represented, whether in a positive or negative video signal, the display effect is substantially the same.
In order to prevent the liquid crystal molecule from continuously receiving a single-polar bias voltage, thus reducing the life span of the liquid crystal molecules, a display cell alternately receives positive and negative polar video signals corresponding to odd and even frames.
During manufacture of LCD panels, ESD frequently occurs on the isolated glass substrate and damages the LCD circuit. Thus, an ESD protection circuit is designed to buffer the ESD stress.
U.S. Pat. No. 6,175,394 discloses an LCD comprising an ESD protection circuit. The ESD protection circuit is connected between a guard ring and a gate electrode or a data electrode, which is a thin film transistor with a floating gate.
U.S. Pat. No. 6,493,047 discloses an LCD comprising an ESD protection circuit. The ESD protection circuit comprises a switch having a control terminal. The ESD protection circuit is connected between a common electrode and a gate electrode or a data electrode.
Conventional methods add a short ring 15 between common electrode 14 and a gate electrode or a data electrode to release ESD current to common electrode 14 through short ring 15.
FIG. 2 shows a circuit of a conventional short ring 15. Short ring 15 comprises diodes 16 and 18. The anode of diode 16 is connected to the cathode of diode 18, and the cathode of diode 16 is connected to the anode of diode 18. Conversely, the anode of diode 18 is connected to the cathode of diode 16, and the cathode of diode 18 is connected to the anode of diode 16. The connection point of the anode of diode 16 and the cathode of diode 18 is connected to a gate electrode (G1˜Gn) or a data electrode (D1˜Dm) connected to the display cell 100, and the connection point of the anode of diode 18 and the cathode of diode 16 is connected to the common electrode 14. When the voltage level of the gate electrode (G1˜Gn) or the data electrode (D1˜Dm) is raised by ESD stress exceeding the threshold voltage of the diode 16, diode 16 is turned on, such that ESD stress is released to common electrode 14 through the turned-on diode 16. The size of common electrode 14 is large enough to sustain the ESD stress, such that damage to the display cell 100 by ESD stress is prevented.
During manufacture of LCD panels, however, ESD may occur on the common electrode 14 and damage the display cell 100 through the turned-on diode 18. Thus, the conventional short ring cannot prevent the occurrence of ESD on the common electrode 14 and resulting damage to the display cell 100. Additionally, the common electrode 14 is not grounded, and ESD protection provided thereby is limited. Thus, ESD stress may flow to other signal lines from the ungrounded common electrode.